* 12 LVDS outputs
* Selectable CLKx, nCLKx inputs
* CLKx, nCLKx pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
.

demanding well defined performance and repeatability. BLOCK DIAGRAM CLK0 nCLK0 Q0A nQ0A Q0B nQ0B Q1A nQ1A Q1B nQ1B PIN.

The ICS8547 is a Hex low skew, high performance 1-to-2 Differential-to-LVDS Clock Buffer HiPerClockS™ and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. Utilizing Low Voltage Differential Signaling (LVDS) the ICS854.

ICS85401

ICS854054

ICS854057

ICS854058AG

ICS85408

ICS854104

ICS85411

ICS85411I

ICS8543

ICS8543I

ICS8545-02

ICS85454-01

ICS8545I-02